Speech coders and decoders, often referred to collectively as “codecs,” are routinely used in communication systems to encode and decode speech signals. In general, codecs are often implemented in software executed by a digital signal processor (DSP). Different codecs often require different processing times, depending on their complexities and the speed of the processor.
Speech codecs that are widely used in various applications include the International Telecommunication Union-Telecommunications (ITU-T) G.723.1 and G.729A codecs. These are complex codecs that usually require large amounts of processing time and memory. Speech coders for both codecs use Algebraic-Code-Excited Linear-Prediction (ACELP), which is based on the Code-Excited Linear-Prediction (CELP) coding model.
Products used in many communication systems often need to support multiple speech codecs, such as in Digital Simultaneous Voice and Data (DSVD) systems and Voice over Internet Protocol (VoIP) systems. Products such as gateway applications also often need to support multiple channels. Large amounts of processing power and memory are typically needed in these products.
FIG. 1 illustrates a conventional ACELP encoder 100. The functional blocks in the ACELP encoder 100 that typically consume the highest proportion of processing power and memory are a Linear Predictive Coding (LPC) analysis block 102, an adaptive codebook search block 104, and a fixed codebook search block 106. Implementing these three functional blocks 102-106 on a co-processor could allow the processing capacity of the DSP to be used for other computations and functions. However, the disparity between different speech codecs often requires that each codec be implemented on a separate co-processor. As a result, supporting multiple codecs would typically require the use of multiple co-processors.
Also, the fixed codebook search algorithms for the G.723.1 (5.3 kbps) and G.729A codecs are based on algebraic codebook searches. Implementing fixed codebook searches for both codecs on a single co-processor could reduce the complexity of the system. This could also allow unused processing power and memory of the DSP to be used for other functions, such as supporting multiple channels and other application-specific modules. However, fixed codebook searches for the G.729A codec use a “depth-first tree search” algorithm, while fixed codebook searches for the G.723.1 codec use a “nested-loop search” or a “focused nested-loop search” algorithm. The “focused nested-loop search” and the “depth-first tree search” algorithms are distinctly different. Attempting to implement these two fixed codebook searches, which are associated with different search algorithms for different codecs, may not result in the desired effect of freeing up processing power or memory. Instead, an additional processing burden would be imposed on the co-processor. Implementing the fixed codebook searches on two different co-processors may be more effective but not necessarily more efficient.